Workshop on Optics and Computer Science


IPDPS 2000 Workshop
Preface

Fault Tolerant Algorithms for a Linear Array with a Reconfigurable Pipelined Bus System
Anu G. Bourgeois; Jerry L. Trahan

Fast and Scalable Parallel Matrix Computations with Optical Buses
Keqin Li

Pulse-Modulated Vision Chips with Versatile-Interconnected Pixels
Jun Ohta; Akihiro Uehara; Takashi Tokuda; Masahiro Nunoshita

Connectivity Models for Optoelectronic Computing Systems
Haldun M. Ozaktas

Optoelectronic-VLSI Technology: Terabit/s I/O to a VLSI Chip
Ashok V. Krishnamoorthy

Three Dimensional VLSI-Scale Interconnects
Dennis W. Prather

Present and Future Needs of Free-Space Optical Interconnects
Sadik Esener; Philippe Marchand

Fast Sorting on a Linear Array with a Reconfigurable Pipelined Bus System
Amitava Datta; Robyn Owens; Subbiah Soundaralakshmi

Architecture description and prototype demonstration of optoelectronic parallel-matching architecture
Keiichiro Kagawa; Kouichi Nitta; Yusuke Ogura; Jun Tanida; Yoshiki Ichioka

A Distributed Computing Demonstration System Using FSOI Inter-Processor Communication
J. Ekman; C. Berger; F. Kiamilev; X. Wang; H. Spaanenburg; P. Marchand; S. Esener

Optoelectronic Multi-Chip Modules Based on Imaging Fiber Bundle Structures
Donald M. Chiarulli; Steven P. Levitan

VCSEL based smart pixel array technology enables chip-to-chip optical interconnect
Yue Liu